Foundation IP

Foundation IPs for

Energy-Efficient SoC

Dolphin Semiconductor’s Foundation IP enhances SoC efficiency by offering embedded memories and standard-cell libraries, vital for optimizing energy and area in technology products. These components support streamlined and innovative chip design, crucial for modern electronic devices.

Standard Cell's Key Features


Off-the-shelf Silicon IPs from 180 nm down to 40 nm
Optimized for TSMC foundry process
Up to 15% smaller area after P&R compared to standard 7-Track library, and up to 30% gain in density at cell level, with SESAME uHD
Always-on with 100x lower leakage and 7x lower area, avoiding the use of a regulator, with our SESAME BiV library
One-stop shop for lower-power SoC

Memory Compilers' Key Features


Off-the-shelf Silicon IPs from 180 nm down to 40 nm
Optimized for TSMC foundry process
Linux Compilers for wider instance generation flexibility
Up to 20% area saving and 50% power saving, for Via-programmable ROM (patented bitcell)
Up to 30% area saving and 50% power savings for our SpRAM Rhea
Multiple power modes flexibility

Benefits


Secured and optimized design of complex SoCs
Reduce the area of the SoC
Ultra high density and low leakage
Optimized memories and standard cells
Cost effective silicon IPs with high performance and low power

Logic Libraries

Standard-cell libraries optimized for supporting ultra low power applications, such as battery-powered IoT or wearable devices.

We offer various optimizations  to optimize dynamic power, leakage power and silicon area.

Embedded Memories

Ultra-low power, high density Single and Dual Port SRAM, Register Files, and Via-programmable ROM.

Our memories support multiple power modes for best SoC power optimization and wake-up time.

Need to Discuss Your Project?

Contact us