Dolphin Semiconductor’s data conversion IP platform: silicon-proven ADC, DAC, ASRC and PDM-to-PCM decimation, licensed as hard and soft IP for integration into a customer SoC. It targets battery-powered designs (hearables, wearables, metering and voice-enabled IoT devices) that need to move a signal between the analog and digital domains at µW power, µs latency and µVrms noise, with 0° phase mismatch across up to 16 channels.
This is a portfolio of data conversion IP blocks (mixed-signal converters and the digital logic that surrounds them) that a chip maker licenses instead of designing the analog front-end in-house. Every block is silicon-proven and delivered with the integration collateral needed to close timing and verification on a customer SoC.
The platform is optimised for one constraint: the conversion path must stay accurate while running off a small battery. That drives every specification below: converter latency in µs so a real-time control or cancellation loop stays stable, noise in µVrms so the converter is not the limiting factor in the signal chain, and a µW always-on budget so a sensing or listening path can run continuously.
Synchronised channels
Phase mismatch
Converter latency
Input-referred noise
Always-on conversion budget
Figures are Dolphin silicon measurements and design targets published in the IP Catalog 2026.
System-level view of where each IP block sits in a typical capture-to-playback signal chain.
Seven licensable data conversion and always-on blocks (four mixed-signal, three digital), each available standalone or pre-assembled into a converter subsystem.
Mixed-signal
Analog-to-digital conversion
µs latency, µVrms input-referred noise
Microphone capture, sensor front-ends, metering
Real-time cancellation & control loops Multi-channel sensor arrays Voice user interface
Mixed-signal
Digital-to-analog conversion of the output path
µs latency, class-AB and class-D output stages
Playback, actuation, control outputs
Real-time cancellation & control loops
Mixed-signal
Analog (neuromorphic) feature extraction ahead of the digital chain
90% energy saving vs. conventional digital capture
Lowest-power voice interface, keyword spotting
Voice user interface
Mixed-signal
Low Area, High Accuracy, Energy Metering 24-bit ADC IP
Active energy accuracy: < 0.1% error over 1/7000 range
For Single or Three Phases
Power Metering IP
Digital
Asynchronous sample-rate conversion between clock domains
Fully digital, process-independent; offloads the DSP
Multi-stream synchronisation, cross-domain bridging
Multi-stream synchronisation
Digital
Decimation of a PDM digital bitstream into PCM samples
Fully digital, small footprint, technology-independent RTL
Digital MEMS microphone and sensor arrays
Multi-channel sensor arrays
Digital
Pulse-width-modulated digital playback output
Fully digital, portable across nodes without redesign
Cost-sensitive playback, buzzers, haptics
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Digital
Voice activity detection that wakes the SoC when speech is present
µW always-on power budget
Wake-on-voice IoT, always-listening remotes
Voice user interface
µs conversion latency keeps a real-time feedback loop inside its stability margin; µVrms input-referred noise keeps the ADC below the sensor’s noise floor; 0° phase mismatch between channels makes an 8-channel array usable without per-device calibration.
Silicon proven Hard IP Node-specific characterisation
Digital blocks are delivered as synthesisable, technology-independent RTL. A derivative SoC on a new node reuses the digital conversion chain unchanged; only the mixed-signal converters are re-characterised.
A typical implementation pairs an ADC-based record path with a DAC-based playback path, each with its own always-on and clocking strategy.
Record path (ADC) and playback path (DAC) detail, including always-on feature extraction, VAD and clocking.
An always-on sensing or listening path fails on power: keeping a full digital capture chain running drains the battery. The Whisper family splits the problem into two always-on stages, built on top of the conversion path, so the SoC only wakes when there is something to process.
Voice activity detection optimised for IoT. Detects human speech and wakes the system on a µW power budget, so the main DSP stays asleep through silence and background noise.
Analog feature extraction, 90% more energy-efficient than a conventional digital capture chain. Delivers the features a keyword-spotting engine needs while the converters and DSP remain off.
Each application is tied to the blocks and the specification that make it work.
ADC DAC
µs converter latency keeps the feedback signal inside the loop’s stability window; µVrms noise preserves the residual-error measurement
ADC PDM to PCM
0° phase mismatch across up to 8 channels removes per-device calibration and lowers the DSP effort needed to combine the array
ASRC
Resamples streams running on unrelated clocks into one domain, avoiding drift artefacts and removing the conversion load from the DSP
WhisperTrigger WhisperExtractor ADC
A µW always-on stage keeps the device listening without waking the SoC, extending battery life in continuously-listening products
Power Metering
Active energy accuracy: < 0.1% error over 1/7000 range. Only 1 mm² for a single phase in 40nm enabling optimized SoC
Off-the-shelf configurations are delivered pre-characterised and ready for integration, allowing project teams to move directly from specification to SoC integration and shorten the overall design schedule.
Every block is silicon-proven on Dolphin test chips, with measured performance on noise, linearity and phase matching. Integration relies on validated data, supporting first-time-right tape-outs.
Licensing provides a predictable, per-project cost model and allows in-house engineering resources to focus on the differentiating functions of the SoC.
Blocks are configurable in channel count, sample rate, output stage class and power modes. Dolphin design teams also tailor them to the target process node and supply requirements.
These blocks have been taped out across mainstream CMOS nodes at several foundries; the exact node and foundry list for a given block is in its datasheet, available on request. Digital blocks (PDM to PCM, ASRC) are technology-independent RTL and are not node-bound.
Dolphin licenses per project, with the option of per-unit royalties depending on the block and the volume. A licence covers the deliverable set needed for integration: views, models, documentation and integration support. Terms are set with the field engineering team during the technical evaluation.
These blocks ship in battery-powered products across audio, sensing and metering: true-wireless earbuds, hearing aids, smart sensors and voice-enabled IoT devices. Customer names are covered by NDA; representative use cases are described in the IP Catalog 2026.
Yes. Dolphin’s Application Lab supports pre-licence technical evaluation, including characterisation data review and integration feasibility on the target node. Requests go through the support channel below.
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